title: On-chip sub-terahertz surface plasmon polariton transmission lines with mode converter in CMOS.
abstract: An on-chip low-loss and high conversion efficiency plasmonic waveguide converter is demonstrated at sub-THz in CMOS. By introducing a subwavelength periodic corrugated structure onto the transmission line (T-line) implemented by a top-layer metal, surface plasmon polaritons (SPP) are established to propagate signals with strongly localized surface-wave. To match both impedance and momentum of other on-chip components with TEM-wave propagation, a mode converter structure featured by a smooth bridge between the Ground coplanar waveguide (GCPW) with 50 Ω impedance and SPP T-line is proposed. To further reduce area, the converter is ultimately simplified to a gradual increment of groove with smooth gradient. The proposed SPP T-lines with the converter is designed and fabricated in the standard 65 nm CMOS process. Both near-field simulation and measurement results show excellent conversion efficiency from quasi-TEM to SPP modes in a broadband frequency range. The converter achieves wideband impedance matching (<-9 dB) with excellent transmission efficiency (averagely -1.9 dB) from 110 GHz-325 GHz. The demonstrated compact and wideband SPP T-lines with mode converter have shown great potentials to replace existing waveguides as future on-chip THz interconnects. To the best of the author's knowledge, this is the first time to demonstrate the (sub)-THz surface mode conversion on-chip in CMOS technology.
authors.affiliation: School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore.
authors.forename: Yuan
authors.initials: Y
authors.lastname: Liang
authors.affiliation: School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore.
authors.forename: Hao
authors.initials: H
authors.lastname: Yu
authors.affiliation: Key Laboratory of RF Circuits and Systems, Ministry of Education, and Zhejiang Provincial Laboratory of Integrated Circuit Design, Hangzhou Dianzi University, Hangzhou, 310018, China.
authors.forename: Jincai
authors.initials: J
authors.lastname: Wen
authors.affiliation: School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore.
authors.forename: Anak Agung Alit
authors.initials: AA
authors.lastname: Apriyana
authors.affiliation: School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore.
authors.forename: Nan
authors.initials: N
authors.lastname: Li
authors.affiliation: School of Electrical and Electronic Engineering, Nanyang Technological University, 639798 Singapore.
authors.forename: Yu
authors.initials: Y
authors.lastname: Luo
authors.affiliation: Key Laboratory of RF Circuits and Systems, Ministry of Education, and Zhejiang Provincial Laboratory of Integrated Circuit Design, Hangzhou Dianzi University, Hangzhou, 310018, China.
authors.forename: Lingling
authors.initials: L
authors.lastname: Sun