title: Hierarchical Address Event Routing for Reconfigurable Large-Scale Neuromorphic Systems.
abstract: We present a hierarchical address-event routing (HiAER) architecture for scalable communication of neural and synaptic spike events between neuromorphic processors, implemented with five Xilinx Spartan-6 field-programmable gate arrays and four custom analog neuromophic integrated circuits serving 262k neurons and 262M synapses. The architecture extends the single-bus address-event representation protocol to a hierarchy of multiple nested buses, routing events across increasing scales of spatial distance. The HiAER protocol provides individually programmable axonal delay in addition to strength for each synapse, lending itself toward biologically plausible neural network architectures, and scales across a range of hierarchies suitable for multichip and multiboard systems in reconfigurable large-scale neuromorphic systems. We show approximately linear scaling of net global synaptic event throughput with number of routing nodes in the network, at 3.6×107synaptic events per second per 16k-neuron node in the hierarchy.
authors.affiliation: Department of Electrical and Computer Engineering, Jacobs School of Engineering, Institute of Neural Computation, University of California at San Diego, La Jolla, CA, USA.
authors.forename: Jongkil
authors.initials: J
authors.lastname: Park
authors.affiliation: Texas Instruments, Santa Clara, CA, USA.
authors.forename: Theodore
authors.initials: T
authors.lastname: Yu
authors.affiliation: Department of Electrical and Computer Engineering, Jacobs School of Engineering, Institute of Neural Computation, University of California at San Diego, La Jolla, CA, USA.
authors.forename: Siddharth
authors.initials: S
authors.lastname: Joshi
authors.affiliation: Institute of Neural Computation, University of California at San Diego, La Jolla, CA, USA.
authors.forename: Christoph
authors.initials: C
authors.lastname: Maier
authors.affiliation: Department of Bioengineering, Jacobs School of Engineering, Institute of Neural Computation, University of California at San Diego, La Jolla, CA, USA.
authors.forename: Gert
authors.initials: G
authors.lastname: Cauwenberghs