Design of a Sub-Picosecond Jitter with Adjustable-Range CMOS Delay-Locked Loop for High-Speed and Low-Power Applications.
A Delay-Locked Loop (DLL) with a modified charge pump circuit is proposed for generating high-resolution linear delay steps with sub-picosecond jitter performance and adjustable delay range. The small-signal model of the modified charge pump circuit is analyzed to bring forth the relationship between the DLL's internal control voltage and output time delay. Circuit post-layout simulation shows that a 0.97 ps delay step within a 69 ps delay range with 0.26 ps Root-Mean Square (RMS) jitter performance is achievable using a standard 0.13 µm Complementary Metal-Oxide Semiconductor (CMOS) process. The post-layout simulation results show that the power consumption of the proposed DLL architecture's circuit is 0.1 mW when the DLL is operated at 2 GHz.
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. bilal.i.abdulrazzaq@gmail.com.|Department of Electronic and Communications Engineering, Al-Nahrain University, Al-Jadriya Complex, Baghdad 10070, Iraq. bilal.i.abdulrazzaq@gmail.com.
Bilal I
BI
Abdulrazzaq
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. omar.j.ibrahim@gmail.com.
Omar J
OJ
Ibrahim
Imaging Devices Laboratory, Research Institute of Electronics, Shizuoka University, 3-5-1 Johoku, Nakaku, Hamamatsu, Shizuoka 432-8011, Japan. kawahito@idl.rie.shizuoka.ac.jp.
Shoji
S
Kawahito
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. roslinams@upm.edu.my.
Roslina M
RM
Sidek
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. suhaidi@upm.edu.my.
Suhaidi
S
Shafie
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. amziah@upm.edu.my.
Nurul Amziah Md
NA
Yunus
Faculty of Engineering, Multimedia University, Persiaran Multimedia, Cyberjaya 63100, Malaysia. linilee@mmu.edu.my.
Lini
L
Lee
Department of Electrical and Electronic Engineering, Faculty of Engineering, Universiti Putra Malaysia, Serdang 43400, Selangor, Malaysia. izhal@upm.edu.my.
Izhal Abdul
IA
Halin
Capacitor-Reset Circuit (CRC); Delay-Locked Loop (DLL); charge pump; delay range; delay step; time jitter
Rev Sci Instrum. 2014 Mar;85(3):034703
24689608