title: Ring-shaped Racetrack memory based on spin orbit torque driven chiral domain wall motions.
abstract: Racetrack memory (RM) has sparked enormous interest thanks to its outstanding potential for low-power, high-density and high-speed data storage. However, since it requires bi-directional domain wall (DW) shifting process for outputting data, the mainstream stripe-shaped concept certainly suffers from the data overflow issue. This geometrical restriction leads to increasing complexity of peripheral circuits or programming as well as undesirable reliability issue. In this work, we propose and study ring-shaped RM, which is based on an alternative mechanism, spin orbit torque (SOT) driven chiral DW motions. Micromagnetic simulations have been carried out to validate its functionality and exhibit its performance advantages. The current flowing through the heavy metal instead of ferromagnetic layer realizes the "end to end" circulation of storage data, which remains all the data in the device even if they are shifted. It blazes a promising path for application of RM in practical memory and logic.
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.
authors.forename: Yue
authors.initials: Y
authors.lastname: Zhang
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.|Institut d'Electronique Fondamentale (IEF), Univ. Paris-Sud, CNRS, Orsay, France.
authors.forename: Xueying
authors.initials: X
authors.lastname: Zhang
authors.affiliation: School of Electrical and Computer Engineering, Oklahoma State University, USA.
authors.forename: Jingtong
authors.initials: J
authors.lastname: Hu
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.
authors.forename: Jiang
authors.initials: J
authors.lastname: Nan
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.
authors.forename: Zhenyi
authors.initials: Z
authors.lastname: Zheng
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.
authors.forename: Zhizhong
authors.initials: Z
authors.lastname: Zhang
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.
authors.forename: Youguang
authors.initials: Y
authors.lastname: Zhang
authors.affiliation: Institut d'Electronique Fondamentale (IEF), Univ. Paris-Sud, CNRS, Orsay, France.
authors.forename: Nicolas
authors.initials: N
authors.lastname: Vernier
authors.affiliation: Institut d'Electronique Fondamentale (IEF), Univ. Paris-Sud, CNRS, Orsay, France.
authors.forename: Dafine
authors.initials: D
authors.lastname: Ravelosona
authors.affiliation: Fert Beijing Institute, Beihang University, Beijing, China.|School of Electronic and Information Engineering, Beihang University, Beijing, China.|Institut d'Electronique Fondamentale (IEF), Univ. Paris-Sud, CNRS, Orsay, France.
authors.forename: Weisheng
authors.initials: W
authors.lastname: Zhao