title: A hybrid pulse combining topology utilizing the combination of modularized avalanche transistor Marx circuits, direct pulse adding, and transmission line transformer.
abstract: Numerous applications driven by pulsed voltage require pulses to be with high amplitude, high repetitive frequency, and narrow width, which could be satisfied by utilizing avalanche transistors. The output improvement is severely limited by power capacities of transistors. Pulse combining is an effective approach to increase the output amplitude while still adopting conventional pulse generating modules. However, there are drawbacks in traditional topologies including the saturation tendency of combining efficiency and waveform oscillation. In this paper, a hybrid pulse combining topology was adopted utilizing the combination of modularized avalanche transistor Marx circuits, direct pulse adding, and transmission line transformer. The factors affecting the combining efficiency were determined including the output time synchronization of Marx circuits, and the quantity and position of magnetic cores. The numbers of the parallel modules and the stages were determined by the output characteristics of each combining method. Experimental results illustrated the ability of generating pulses with 2-14 kV amplitude, 7-11 ns width, and a maximum 10 kHz repetitive rate on a matched 50-300 Ω resistive load. The hybrid topology would be a convinced pulse combining method for similar nanosecond pulse generators based on the solid-state switches.
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Jiangtao
authors.initials: J
authors.lastname: Li
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Zheng
authors.initials: Z
authors.lastname: Zhao
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Yi
authors.initials: Y
authors.lastname: Sun
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Yuhao
authors.initials: Y
authors.lastname: Liu
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Ziyuan
authors.initials: Z
authors.lastname: Ren
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Jiaxin
authors.identifier: 0000000166512680
authors.initials: J
authors.lastname: He
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Hui
authors.initials: H
authors.lastname: Cao
authors.affiliation: School of Electrical Engineering, Xi'an Jiaotong University, Xi'an 710049, China.
authors.forename: Minjun
authors.initials: M
authors.lastname: Zheng